PCB Design
PCB Design Portfolio
Stilwell Baker has successfully designed complex boards across a range of industries. Below are representative examples. Send us your board design needs and let us work for you.
Micro-ATX PC Motherboard
Project Parameters |
Input Data |
Schematic, BOM, Design Rules |
EDA Tool |
Mentor Expedition 2005 |
Major Changes |
0 |
Minor Changes |
3 |
Design Time |
4 Days |
Design Cost |
$3,040 |
-
Customer needed to develop a very integrated lowcost
PC motherboard that supported high-volume manufacturing
and test requirements.
-
All topside component mounting, muti-rail VLSI devices,
wake-on-LAN and suspend-to-RAM power delivery — plus
100% secondary side test access on a minimum of 0.070” probable
pitch — was believed to be impossible to implement
in only 4 metal layers.
-
Stilwell Baker interconnect specialists working around the clock
were able to route this while meeting strict timing
specifications — and in 3 weeks.
-
100% ATE test access was designed into the placement
and routing solution using a controversial modeling
of all test access points as pseudo-surface mount components.
14-Layer Compact PCI PCB Stackup
Project Parameters |
Input Data |
Schematic, BOM, Design Rules |
EDA Tool |
Mentor Expedition 2005 |
Major Changes |
2 |
Minor Changes |
5 |
Design Time |
11 Days |
Design Cost |
$8,360 |
-
Customer planned to design a very dense data recorder
controller in the Compact PCI form factor containing
sub-1mm-pitch BGA devices.
-
The card contained significant combinations of LVTTL
timing-constrained DDR memory busses plus many LVDS, 1394B
and analog circuitry, each with its own characteristic
impedance targets.
-
Routing area studies proved the design would take,
at a minimum, 6 optimally used signal routing layers
to complete.
-
Standard Compact PCI form factor specifies a maximum
finished substrate thickness of ~0.062”, limiting the
total number of metal layers.
Desktop PCI Packet Processing Engine
Project Parameters |
Input Data |
Schematic, BOM |
EDA Tool |
Mentor PADS |
Major Changes |
3 |
Minor Changes |
4 |
Design Time |
17 Days |
Design Cost |
$14,280 |
-
PCB aspect ratio and maximum finished thickness (~0.065”)
of the desktop PCI PCB form factor created a horizontal routing bottleneck
and limited the number of impedance-controlled signal
routing layers available.
-
Stilwell Baker’s proven PCB channel-routing strategy provided
an accurate metric for routing area prediction ahead of detailed routing efforts.
-
Component placement and SMD escape routing respected
the formalized coarse via matrix and loosely coupled
twin conductor routing channel strategy.
